A 99-mm super(2) 0.7-W single-chip MPEG-2 422PL video, audio, and system encoder with a 64-Mb embedded DRAM for portable 422PL encoder system

• Published in: IEEE journal of solid-state circuits Vol. 37; no. 3
• Main Authors: Kumaki, S, Takata, H, Ajioka, Y, Ooishi, T, Ishihara, K, Hanami, A, Tsuji, T, Watanabe, T, Morishima, C, Yoshizawa, T, Sato, H, Hattori, S, Koshio, A, Tsukamoto, K, Matsumura, T
• Format: Journal Article
• Language: English
• Published: 01-01-2002
• Subjects: Circuits; Coders; Dynamic random access memory; Encoders; Encoding; Large scale integration; Portability; Power consumption
• ISSN: 0018-9200
• DOI: 10.1109/4.987099

A scalable single-chip 422PL MPEG-2 video, audio, and system encoder LSI for portable 422PL system is described. The encoder LSI is implemented using 0.13- mu m embedded DRAM technology. It integrates 3-M logic gates and 64-Mb DRAM in an area of 99-mm super(2). The power consumption is suppressed to 0.7 W by adopting a low-power DRAM core. It performs real-time 422PL video encoding, audio encoding, and system encoding with no external DRAM. Furthermore, the encoder LSI realizes a 422PL video encoder with multichip configuration, due to its scalable architecture. This results in a PC-card size 422PL encoder for portable HDTV codec system