Comparison of latchup immunity for silicided source/drain at different n super(+) implant energy

• Published in: Microelectronics and reliability Vol. 38; no. 9; pp. 1401 - 1405
• Main Authors: Leong, Kam-Chew, Liu, Po-Ching, Yeo, Kiat Seng, Gan, Chock-Hing, Qian, Gang, Lee, Yong-Meng, Chan, Lap
• Format: Journal Article
• Language: English
• Published: 01-09-1998
• ISSN: 0026-2714

The effect of titanium silicided (TiSi sub(2)) on latchup immunity for different n super(+) source/drain (s/d) junction depth is investigated. Highly latchup immune 0.25 mu m CMOS devices have been fabricated with a 50 angstrom gate oxide, retrograde twin-well and titanium silicided shallow s/d. The trigger current (I sub(trig)) more than doubled from 14 to 32 mA, while the current gain of the npn parasitic BJT ( beta ) is reduced from 4.9 to 2.5. These improvements are observed when comparing between non-silicided and silicided s/d with shallow junction (at 30 keV). However, when the s/d junction is deep (at 40 keV), the improvement in latchup immunity of silicided s/d over non-silicided s/d decreases. In addition, silicided wafers with shallow junction are more latchup immune than those with deep junction. The above observations are attributed to the reduction of the emitter width and the dopant consumption during TiSi sub(2) formation, enhanced hole injection due to thinner interfacial oxide, and larger contact area of the silicide and silicon (Si).