Silicon oxide enhanced Schottky gate In(0.53)Ga(0.47)As FET's with a self-aligned recessed gate structure

• Published in: IEEE electron device letters Vol. EDL-5; pp. 511 - 514
• Main Authors: Cheng, C L, Liao, A S H, Chang, T Y, Caridi, E A, Coldren, L A, Lalevic, B
• Format: Journal Article
• Language: English
• Published: 01-12-1984
• ISSN: 0741-3106

The fabrication and characterization of an In(0.53)Ga(0.47)As enhanced Schottky gate FET with a self-aligned recessed gate structure are presented. A thin layer of e-beam evaporated silicon oxide was used to reduce the gate leakage current. For a n-channel doping of 8 x 10 to the 16th per cu cm and a gate length of 1.5 microns, these devices showed good pinchoff characteristics with transconductances of 150 mS/mm. The effective velocity of electrons at current saturation is deduced to be 2.4 x 10 to the 7th cm/s at the drain end of the gate. At 3 GHz these devices have a maximum available gain of 10 dB, decreasing to 6 dB at 6 GHz.