Analog front end for DMT-based VDSL

A 12MHz 760mW analog front end for DMT-based VDSL integrates all active components except line driver in a single BiCMOS 0.35/spl mu/m ASIC. When fully active, the ASIC dissipates 480mW at 3.3V supply, providing resolution equivalent to 12b without trimming.

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Bibliographic Details
Published in:2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315) Vol. 1; pp. 328 - 471 vol.1
Main Authors: De Wilde, W., Scantamburlo, N., Combe, M., Van Leeuwe, J., Doorakkers, K., Mazoyer, Y., Renous, C., Petigny, R., Bonin, A., Bayracki, B., Belhi, B., Moons, E., Sevenhans, J.
Format: Conference Proceeding
Language:English
Published: IEEE 2002
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Description
Summary:A 12MHz 760mW analog front end for DMT-based VDSL integrates all active components except line driver in a single BiCMOS 0.35/spl mu/m ASIC. When fully active, the ASIC dissipates 480mW at 3.3V supply, providing resolution equivalent to 12b without trimming.
ISBN:9780780373358
0780373359
DOI:10.1109/ISSCC.2002.993065