A \muProcessor Layer for mm-Scale Die-Stacked Sensing Platforms Featuring Ultra-Low Power Sleep Mode at 125°C

• Published in: 2020 IEEE Asian Solid-State Circuits Conference (A-SSCC) pp. 1 - 4
• Main Authors: Lee, Jeongsup, Kim, Yejoong, Cho, Minchang, Yasuda, Makoto, Miyoshi, Satoru, Kawaminami, Masaru, Blaauw, David, Sylvester, Dennis
• Format: Conference Proceeding
• Language: English
• Published: IEEE 09-11-2020
• Subjects: DC-DC power converters; high temperature; low power; Low-power electronics; mm-scale; mu processor; Random access memory; Sensors; sleep mode; Temperature sensors; Wireless communication; wireless sensor; Wireless sensor networks
• DOI: 10.1109/A-SSCC48613.2020.9336116

This paper presents an ultra-low power sleep mode \mu processor layer designed for use in mm-scale die-stacked wireless sensing platforms for high temperature applications. A compact DC-DC converter is incorporated with a 16kB custom SRAM for self-sufficient memory data retention, enabling a platform-level deep sleep mode. The proposed system is fabricated in a USJC 55nm deeply depleted channel (DDC) technology that is deliberately shifted to the slow corner, allowing the complete sensing platform to retain full memory contents with 0.54\mu\mathrm{W} during sleep mode at 125°C, which is 26× lower than without the proposed techniques.