2.6GHz ultra-wide voltage range energy efficient dual A9 in 28nm UTBB FD-SOI

• Published in: 2013 Symposium on VLSI Circuits pp. C44 - C45
• Main Authors: Jacquet, D., Cesana, G., Flatresse, P., Arnaud, F., Menut, P., Hasbani, F., Di Gilio, T., Lecocq, C., Roy, T., Chhabra, A., Grover, C., Minez, O., Uginet, J., Durieu, G., Nyer, F., Adobati, C., Wilson, R., Casalotto, D.
• Format: Conference Proceeding
• Language: English
• Published: IEEE 01-06-2013
• Subjects: Energy efficiency; Generators; Logic gates; Memory management; Multicore processing; Very large scale integration
• ISBN: 1467355313; 9781467355315
• ISSN: 2158-5601; 2158-5636

This paper presents the implementation details and silicon results of a 2.6GHz dual-core ARM Cortex A9 manufactured in a 28nm Ultra-Thin Body and BOX FD-SOI technology. The implementation is based on a fully synthesizable standard design flow, and the design exploits the great flexibility provided by FD-SOI technology, notably a wide Dynamic Voltage and Frequency Scaling (DVFS) range, from 0.6V to 1.2V, and forward body bias (FBB) techniques up to 1.3V bias voltage, thus enabling an extremely energy efficient implementation.