A 19nm 112.8mm2 64Gb multi-level flash memory with 400Mb/s/pin 1.8V Toggle Mode interface

• Published in: 2012 IEEE International Solid-State Circuits Conference pp. 422 - 424
• Main Authors: Shibata, N., Kanda, K., Hisada, T., Isobe, K., Sato, M., Shimizu, Y., Shimizu, T., Sugimoto, T., Kobayashi, T., Inuzuka, K., Kanagawa, N., Kajitani, Y., Ogawa, T., Nakai, J., Iwasa, K., Kojima, M., Suzuki, T., Suzuki, Y., Sakai, S., Fujimura, T., Utsunomiya, Y., Hashimoto, T., Miakashi, M., Kobayashi, N., Inagaki, M., Matsumoto, Y., Inoue, S., He, D., Honda, Y., Musha, J., Nakagawa, M., Honma, M., Abiko, N., Koyanagi, M., Yoshihara, M., Ino, K., Noguchi, M., Kamei, T., Kato, Y., Zaitsu, S., Nasu, H., Ariki, T., Chibvongodze, H., Watanabe, M., Ding, H., Ookuma, N., Yamashita, R., Liang, G., Hemink, G., Moogat, F., Trinh, C., Higashitani, M., Pham, T., Kanazawa, K.
• Format: Conference Proceeding
• Language: English
• Published: IEEE 01-02-2012
• Subjects: Computer architecture; Flash memory; Layout; Microprocessors; Nonvolatile memory; Programming; Throughput
• ISBN: 1467303763; 9781467303767
• ISSN: 0193-6530; 2376-8606
• DOI: 10.1109/ISSCC.2012.6177073

NAND flash memory is widely used in digital cameras, USB devices, cell phones, camcorders and solid-state drives. Continuous lowering of bit cost, increasing flash-memory-die densities and improving performance have helped to expand flash markets. Recently, there are two different directions to meet market demands. One is lowering bit cost and increase memory density to the utmost limit, which is achieved by 4b/cell [1] or 3b/cell [2]. The other is focusing on high performance and high reliability. To meet both demands, we develop a 19nm 112.8mm 2 64Gb 2b/cell NAND flash memory with the smallest die size ever reported. 15MB/s programming throughput and 400Mb/s/pin 1.8V Toggle Mode interface [3] are achieved for the first time. Die Micrograph and features are shown in Figure 25.1.1.