A low leakage low cost-PMOS based power supply clamp with active feedback for ESD protection in 65nm CMOS technologies
A novel PMOS based power supply protection clamp is presented which is designed to operate in a state-of-the art 65 nm, low leakage CMOS process. The design is shown to be amenable to the inherent challenges posed by low cost I/O transistors. Robust ESD and electrical operation is shown as well as i...
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Published in: | 2005 Electrical Overstress/Electrostatic Discharge Symposium pp. 1 - 9 |
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Main Authors: | , , |
Format: | Conference Proceeding |
Language: | English |
Published: |
IEEE
01-09-2005
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Subjects: | |
Online Access: | Get full text |
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Summary: | A novel PMOS based power supply protection clamp is presented which is designed to operate in a state-of-the art 65 nm, low leakage CMOS process. The design is shown to be amenable to the inherent challenges posed by low cost I/O transistors. Robust ESD and electrical operation is shown as well as immunity to transient latch-up. |
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