Substrate bias effects on short channel length and narrow channel width PMOS devices at cryogenic temperatures

The effects of substrate biasing on the characteristics of PMOS devices with varying channel lengths and widths were studied as a function of temperature from 300 K to 77 K. Results on the low field intrinsic mobility, the mobility surface and substrate bias degradation constants, and the effective...

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Bibliographic Details

Published in:	Proceedings of the Workshop on Low Temperature Semiconductor Electronics pp. 53 - 57
Main Authors:	Deen, M.J., Wang, J., Yan, Z.X., Zuo, Z.P.
Format:	Conference Proceeding
Language:	English
Published:	IEEE 1989
Subjects:	Cryogenics Degradation Doping Integrated circuit interconnections MOS devices Rough surfaces Surface resistance Surface roughness Tellurium Temperature
Online Access:	Get full text
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