Two VLSI structures for implementing the gray level co-occurrence method

• Published in: [1990] Proceedings. The Twenty-Second Southeastern Symposium on System Theory pp. 315 - 318
• Main Authors: Barbir, A.O., Ng, C.T., Teague, D.
• Format: Conference Proceeding
• Language: English
• Published: IEEE Comput. Soc. Press 1990
• Subjects: Algorithm design and analysis; Computational modeling; Computer science; Histograms; Image analysis; Image texture analysis; Parallel architectures; Pattern recognition; Systolic arrays; Very large scale integration
• ISBN: 0818620382; 9780818620386
• ISSN: 0094-2898; 2161-8135
• DOI: 10.1109/SSST.1990.138162

The gray-level co-occurrence (GLC) method is a powerful technique that computes several GLC matrices on subregions of an image to measure its textural qualities. The method is not suitable for real-time image analysis and pattern recognition because of its high compute time. The authors propose a systolic array and a parallel architecture for evaluating the algorithm in an optimum time. Novel features of the structures include the minimization of intermediate I/O operations and the use of current existing hardware devices. The architectures are time optimal and are suitable for algorithm partitioning.< >