A 0.8 /spl mu/m CMOS switched-capacitor video filter

• Published in: Proceedings. SBCCI 2004. 17th Symposium on Integrated Circuits and Systems Design (IEEE Cat. No.04TH8784) pp. 39 - 43
• Main Authors: Petraglia, A., Canive, J.M., Petraglia, M.R.
• Format: Conference Proceeding
• Language: English
• Published: IEEE 2004
• Subjects: Application software; CMOS integrated circuits; Computer simulation; Filtering; Frequency; Integrated circuit noise; Low pass filters; Passband; Prototypes; Sampling methods
• ISBN: 1581139470; 9781581139471

The very low sensitivity properties of switched-capacitor filtering structures implemented as a parallel connection of two allpass sections has already been demonstrated theoretically and verified by computer simulation. This paper describes the design of a fifth-order low pass elliptic filter using this technique, to satisfy specifications commonly used in video frequency applications. Operating with a sampling frequency of 16 MHz, the IC prototype was implemented in a standard double-poly CMOS 0.8 /spl mu/m process. The experimental results obtained with the fabricated IC showed a passband frequency deviation smaller than 0.08 dB up to the passband edge frequency of 3.4 MHz, and an output noise power of 0.97 /spl mu/V/sub RMS///spl radic/(Hz), resulting in a dynamic range of 49.1 dB.