A 40 MHz programmable and reconfigurable filter processor

A 40 MHz programmable and reconfigurable filter processor

A programmable and reconfigurable filter processor comprising four 16*16 multiplier-accumulators is presented. The processor, fabricated in a 1.5- mu m 2-layer metal CMOS process, has been tested and is fully functional up to 40 MHz clock frequency. It can be programmed and reconfigured via an on-ch...

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Bibliographic Details
Published in:IEEE Proceedings of the Custom Integrated Circuits Conference pp. 13.2/1 - 13.2/4
Main Authors: Cai, M.M., Luthi, D.A., Ruetz, P.A., Ang, P.H.
Format: Conference Proceeding
Language:English
Published: IEEE 1990
Subjects:
Adaptive filters
Adders
Clocks
Delay
Digital signal processing
Discrete cosine transforms
Image processing
Radar applications
Radar signal processing
Registers
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Summary:A programmable and reconfigurable filter processor comprising four 16*16 multiplier-accumulators is presented. The processor, fabricated in a 1.5- mu m 2-layer metal CMOS process, has been tested and is fully functional up to 40 MHz clock frequency. It can be programmed and reconfigured via an on-chip sequencer for a range of applications, including radar signal processing, image processing, discrete cosine transform, discrete Fourier transform, and other general inner product applications.< >
DOI:10.1109/CICC.1990.124725