The use of multithreading for exception handling

• Published in: Proceedings of the 32nd annual ACM/IEEE international symposium on Microarchitecture pp. 219 - 229
• Main Authors: Zilles, Craig B., Emer, Joel S., Sohi, Gurindar S.
• Format: Conference Proceeding
• Language: English
• Published: Washington, DC, USA IEEE Computer Society 16-11-1999
• Series: ACM Conferences
• Subjects: Hardware; Hardware > Very large scale integration design > Application-specific VLSI designs > Application specific instruction set processors; Software and its engineering > Software notations and tools > General programming languages > Language features > Control structures; Software and its engineering > Software organization and properties > Contextual software domains > Operating systems > Process management
• ISBN: 9780769504377; 076950437X
• DOI: 10.5555/320080.320114

Common hardware exceptions, when implemented by trapping, unnecessarily serialize program execution in dynamically scheduled superscalar processors. To avoid the consequences of trapping the main program thread, multithreaded CPUs can exploit control and data independence by executing the exception handler in a separate hardware context. The main thread doesn't squash instructions after the excepting instruction, conserving fetch bandwidth and allowing execution of instructions independent of the exception. This leads to earlier branch resolution in the post exception code and additional memory latency tolerance. As a proof of concept, using threads to handle software TLB misses is shown to provide performance approaching that of an aggressive hardware TLB miss handler.