Mixed body bias techniques with fixed Vt and Ids generation circuits

Mixed body bias techniques with fixed Vt and Ids generation circuits

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Bibliographic Details
Published in:IEEE journal of solid-state circuits Vol. 40; no. 1; p. 60
Main Authors: Sumita, M, Sakiyama, S, Kinoshita, M, Araki, Y, Ikeda, Y, Fukuoka, K
Format: Journal Article
Language:English
Published: New York The Institute of Electrical and Electronics Engineers, Inc. (IEEE) 01-01-2005
Online Access:Get full text
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Description
ISSN:0018-9200
1558-173X
DOI:10.1109/JSSC.2004.838013