Energy-Band-Engineered Unified-RAM (URAM) Cell on Buried [Formula Omitted] Substrate for Multifunctioning Flash Memory and 1T-DRAM

• Published in: IEEE transactions on electron devices Vol. 56; no. 4; pp. 641 - 647
• Main Authors: Jin-Woo Han, Jin-Woo Han, Seong-Wan Ryu, Seong-Wan Ryu, Chung-Jin Kim, Chung-Jin Kim, Sung-Jin Choi, Sung-Jin Choi, Sungho Kim, Sungho Kim, Jae-Hyuk Ahn, Jae-Hyuk Ahn, Dong-Hyun Kim, Dong-Hyun Kim, Kyu Jin Choi, Kyu Jin Choi, Byung Jin Cho, Byung Jin Cho, Jin-Soo Kim, Jin-Soo Kim, Kwang Hee Kim, Kwang Hee Kim, Gi-Sung Lee, Gi-Sung Lee, Jae-Sub Oh, Jae-Sub Oh, Myeong-Ho Song, Myeong-Ho Song, Yun Chang Park, Yun Chang Park, Jeoung Woo Kim, Jeoung Woo Kim, Yang-Kyu Choi, Yang-Kyu Choi
• Format: Journal Article
• Language: English
• Published: New York The Institute of Electrical and Electronics Engineers, Inc. (IEEE) 01-04-2009
• ISSN: 0018-9383; 1557-9646
• DOI: 10.1109/TED.2009.2014197

A band-offset-based unified-RAM (URAM) cell fabricated on a Si/Si@@d1- y@C@@dy@ substrate is presented for the fusion of a nonvolatile memory (NVM) and a capacitorless 1T-DRAM. An oxide/nitride/oxide (O/N/O) gate dielectric and a floating-body are combined in a FinFET structure to perform URAM operation in a single transistor. The O/N/O layer is utilized as a charge trap layer for NVM, and the floating-body is used as an excess hole storage node for capacitorless 1T-DRAM. The introduction of a pseudomorphic SiC-based heteroepitaxial layer into the Si substrate provides band offset in a valence band. The FinFET fabricated on the energy-band-engineered Si@@d1-y@C@@dy@ substrate allows hole accumulation in the channel for 1T-DRAM. The band- engineered URAM yields a cost-effective process that is compatible with a conventional body-tied FinFET SONOS. The fabricated URAM shows highly reliable NVM and high-speed 1T-DRAM operations in a single memory cell.