Design of a new high speed amplifier circuit for the analog subsystems
A high speed CMOS amplifier circuit with a new architecture especially suited for analog subsystems and a simple high speed CMOS comparator utilizing the proposed CMOS amplifier circuit are presented. The proposed circuit is simulated using 0.35-m process parameters. The configuration results in sev...
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| Published in: | Analog integrated circuits and signal processing Vol. 33; no. 1; pp. 57 - 63 |
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| Main Authors: | , , |
| Format: | Journal Article |
| Language: | English |
| Published: |
01-10-2002
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| Online Access: | Get full text |
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| Summary: | A high speed CMOS amplifier circuit with a new architecture especially suited for analog subsystems and a simple high speed CMOS comparator utilizing the proposed CMOS amplifier circuit are presented. The proposed circuit is simulated using 0.35-m process parameters. The configuration results in several performance improvements over a typical CMOS differential to single-ended amplifier. Design details and simulation results show that the newly designed CMOS amplifier circuit and the high speed CMOS comparator are applicable to high speed analog subsystems, especially the flash A/D converter. (Author) |
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| Bibliography: | ObjectType-Article-2 SourceType-Scholarly Journals-1 ObjectType-Feature-1 content type line 23 |
| ISSN: | 0925-1030 |
| DOI: | 10.1023/A:1020385113159 |