Fast FPGA-based frame grabber for digital progressive scan image sensors

The paper presents a custom designed frame grabber for a digital progressive scan image sensor. The system was designed using VHDL and then implemented within Spartan-6 FPGA. The whole project was successfully tested on Atlys development board with the MT9P031 image sensor attached. The architecture...

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Bibliographic Details
Published in:2014 Proceedings of the 21st International Conference Mixed Design of Integrated Circuits and Systems (MIXDES) pp. 533 - 536
Main Authors: Michalak, Mateusz, Sekalski, Przemyslaw, Grabowski, Kamil, Izydorczyk, Sebastian
Format: Conference Proceeding
Language:English
Published: Department of Microelectronics and Computer Scienc 01-06-2014
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Summary:The paper presents a custom designed frame grabber for a digital progressive scan image sensor. The system was designed using VHDL and then implemented within Spartan-6 FPGA. The whole project was successfully tested on Atlys development board with the MT9P031 image sensor attached. The architecture of the overall image acquisition system as well as its modules are described in details. Despite of its relatively simple structure, performed tests proved that the developed frame grabber achieves pixel stream speed up to 1.15 Gbps.
DOI:10.1109/MIXDES.2014.6872258