Noise distribution of multi-core CPU packages

Noise distribution of multi-core CPU packages

This paper deals with noise distribution over nonuniform two-dimensional planes of multi-core CPU packages. The numerical algorithm is based on circuit finite difference time domain, which employs voltage-controlled current sources in the current/voltage updating scheme. It is applied to plane pairs...

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Bibliographic Details
Published in:19th Topical Meeting on Electrical Performance of Electronic Packaging and Systems pp. 209 - 212
Main Authors: Jinseong Choi, Beker, B, Hilbert, C
Format: Conference Proceeding
Language:English
Published: IEEE 01-10-2010
Subjects:
Capacitors
circuit FDTD
Finite difference methods
Integrated circuit modeling
Load modeling
Noise
PDN
Silicon
Supply Noise
Time domain analysis
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Summary:This paper deals with noise distribution over nonuniform two-dimensional planes of multi-core CPU packages. The numerical algorithm is based on circuit finite difference time domain, which employs voltage-controlled current sources in the current/voltage updating scheme. It is applied to plane pairs with non-uniform geometry (which can include metal voids), as well as arbitrary location of sources and decoupling capacitors. The model is extended to a full-3D package stack-up, and the noise distribution on the power planes is analyzed with uniform and point-source excitation.
ISBN:9781424468652
1424468655
ISSN:2165-4107
DOI:10.1109/EPEPS.2010.5642580