FPGA Implementation of 160- Bit Vedic Multiplier

The rapid growth of technology influenced the need for the design of highly efficient digital systems. Multipliers have been playing a crucial role in every digital design. It is necessary to make use of an efficient multiplier. Many algorithms came into existence aiming at the reduction of executio...

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Bibliographic Details

Published in:	2014 International Conference on Devices, Circuits and Communications (ICDCCom) pp. 1 - 5
Main Authors:	Kodali, Ravi Kishore, Yenamachintala, Sai Sourabh, Boppana, Lakshmi
Format:	Conference Proceeding
Language:	English
Published:	IEEE 01-09-2014
Subjects:	Adders Algorithm design and analysis Computers Delay effects Field programmable gate arrays Signal processing algorithms
Online Access:	Get full text
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