Development of compact SPICE-models of IC resistive interconnects with different configurations

• Published in: 2018 Moscow Workshop on Electronic and Networking Technologies (MWENT) pp. 1 - 4
• Main Authors: Petrosyants, Konstantin O., Ryabov, Nikita I., Lvov, Boris G., Batarueva, Ekaterina I.
• Format: Conference Proceeding
• Language: English
• Published: IEEE 01-03-2018
• Subjects: Conferences; Delays; electrical model; Equivalent circuits; Finite element analysis; Integrated circuit interconnections; Integrated circuit modeling; LSI interconnections; reduction; signal delay in interconnections; Solid modeling
• DOI: 10.1109/MWENT.2018.8337198

In case of the modern sizes of chips influence of interconnections is so significant that need interconnections compact electrical model of creation appeared. This model has to consider effects of corners that circuit developers could imitate most precisely practical circuits at their design. The purpose of this paper is to develop compact SPICE models for standard configurations of LSI interconnections. For achievement of this goal the interconnection model in the form of the distributed RC circuit is used. Proceeding from potential distribution along the interconnection, his model parameters - resistance and the capacity of RC circuit links are calculated that allows to consider influence of bends on interconnection electric properties. For simplification of interconnection model and reduction of a counting duration the multi-sectional RC model is reduced in the compact Pi-shaped equivalent circuit. For each of the main topology the parameters for Pi-shaped equivalent circuits, which give accuracy in the frequency parameters of 98% on a phase and 93% on amplitude, are calculated. Upon transition to the Pi-shaped equivalent circuit the CPU time is reduced by 28%.