A low-noise reconfigurable full-duplex front-end with self-interference cancellation and harmonic-rejection power amplifier for low power radio applications

• Published in: ESSCIRC 2017 - 43rd IEEE European Solid State Circuits Conference pp. 336 - 339
• Main Authors: Tong Zhang, Yongdong Chen, Chenxi Huang, Rudell, Jacques C.
• Format: Conference Proceeding
• Language: English
• Published: IEEE 01-09-2017
• Subjects: CMOS Integrated Circuits; Interference Cancellation; Radio frequency; Radio spectrum management
• DOI: 10.1109/ESSCIRC.2017.8094594

A low-power radio analog front-end which includes a self-interference (SI) cancellation circuit and a harmonic-rejection power amplifier (HRPA), is proposed to reduce the interaction between a transmitter (TX) and receiver (RX), to enable full-duplex operation. A prototype TSMC device demonstrates more than 30dB SI cancellation over a 4MHz BW and a PA 3 rd and 5 th harmonic reduction of 30dB and 15dB, respectively. The SI cancellation circuitry occupies an active area of 131×112.5μm 2 , consumes 0.25mW from a 1.2V supply and degrades the RX NF by less than 0.6dB.