Error localization in test outputs: A generalized analysis of signature compression

• Published in: Proceedings of 1993 IEEE 2nd Asian Test Symposium (ATS) pp. 317 - 322
• Main Authors: Demidenko, S., Piuri, V., Ivaniukovich, A.
• Format: Conference Proceeding
• Language: English
• Published: IEEE Comput. Soc. Press 1993
• Subjects: Circuit faults; Circuit testing; Computational Intelligence Society; Cybernetics; Digital circuits; Mission critical systems; Performance evaluation; Polynomials; Registers; Table lookup
• ISBN: 081863930X; 9780818639302
• DOI: 10.1109/ATS.1993.398824

Signature compression is widely used to reduce the volume of information generated by testing. Localization of the faulty component in the system under test, starting from the signature analysis, may be a complex problem related to identification of the erroneous bits in the sequence being compressed and to the error model of the system. A first technique for low-multiplicity errors is based on error effects' superposition. A novel general solution is derived for any-multiplicity errors from the analytical description of signature compression.< >