Modeling the probability of defect excitation for a commercial IC with implications for stuck-at fault-based ATPG strategies

• Published in: International Test Conference 1999. Proceedings (IEEE Cat. No.99CH37034) pp. 1031 - 1037
• Main Authors: Dworak, J., Grimaila, M.R., Lee, S., Wang, L.-C., Mercer, M.R.
• Format: Conference Proceeding
• Language: English
• Published: IEEE 1999
• Subjects: Automatic test pattern generation; Circuit faults; Circuit testing; Digital integrated circuits; Fault detection; Integrated circuit modeling; Integrated circuit yield; Manufacturing processes; Pattern analysis; Probability
• ISBN: 0780357531; 9780780357532
• ISSN: 1089-3539; 2378-2250
• DOI: 10.1109/TEST.1999.805836

If many potential defects exist at each site in an integrated circuit, then as the number of applied test patterns increases, the number of defects which remain undetected decreases monotonically. Modeling this rate of decline in defective part level is a non-trivial problem. We show that the number of times each site is observed serves as a significantly superior basis for modeling this phenomenon when contrasted with the number of faults detected. This "site observation-based" predictor not only increases the accuracy of defective part level prediction, it also provides the first quantitative method for comparing the effectiveness of various ATPG strategies to reduce the defective part level.