Compact modeling solution of layout dependent effect for FinFET technology

• Published in: Proceedings of the 2015 International Conference on Microelectronic Test Structures pp. 110 - 115
• Main Authors: Chen, David C., Lin, Guan Shyan, Lee, Tien Hua, Lee, Ryan, Liu, Y C, Wang, Meng Fan, Cheng, Yi Ching, Wu, D. Y.
• Format: Conference Proceeding Journal Article
• Language: English
• Published: IEEE 01-03-2015
• Subjects: Boundaries; Circuits; Conferences; Devices; Diffusion; FinFETs; Layout; Logic gates; Mathematical model; Mathematical models; Metals; MOSFET circuits; Nondestructive testing; Performance evaluation; Proximity effect (electricity)
• ISBN: 1479983020; 9781479983025
• ISSN: 1071-9032; 2158-1029
• DOI: 10.1109/ICMTS.2015.7106119

We successfully developed and verified a complete compact model solution for layout dependent effect (LDE) of FinFET technology. LDE has significant impact on the device performances mainly due to the application of stressors and aggressive device scaling. With LDE, performance degradation may be up to 10% or more. In this work, compact model solution for Length of Oxidation (LOD), Well Proximity Effect (WPE), Neighboring Diffusion Effect (NDE), Metal Boundary Effect (MBE), and Gate Line End Effect (GLE) were delivered. This solution was implemented successfully in BSIM-CMG for efficient circuit simulation.