Power-efficient trace caches

Power-efficient trace caches

Summary form only given. This paper exploits the drawbacks of wasting power when accessing the instruction cache that stores only static sequence of instructions. Although trace cache is first introduced to catch the dynamic characteristics of instructions in execution, conventional trace cache (CTC...

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Bibliographic Details
Published in:Design, Automation, and Test in Europe: Proceedings of the conference on Design, automation and test in Europe; 04-08 Mar. 2002 p. 1091
Main Authors: Hu, J.S., Vijaykrishnan, N., Kandemir, A., Irwin, A.J.
Format: Conference Proceeding
Language:English
Published: IEEE 2002
Subjects:
Energy consumption
Online Access:Get full text
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Summary:Summary form only given. This paper exploits the drawbacks of wasting power when accessing the instruction cache that stores only static sequence of instructions. Although trace cache is first introduced to catch the dynamic characteristics of instructions in execution, conventional trace cache (CTC) does increase the power consumption in fetch unit. A Sequential Trace Cache (STC) has been investigated for its power efficiency in this paper.
Bibliography:SourceType-Conference Papers & Proceedings-1
ObjectType-Conference Paper-1
content type line 25
ISBN:0769514715
9780769514710
ISSN:1530-1591
1558-1101
DOI:10.1109/DATE.2002.999209