Advanced Inspection Methodology for the Maximum Extension of Nitride Test Wafer Recycling

• Published in: 2020 31st Annual SEMI Advanced Semiconductor Manufacturing Conference (ASMC) pp. 1 - 5
• Main Authors: Ke, Yu-Yuan, Chen, Kuang-Hsiu, Chen, Shin-Ru, Huang, Guan-Wei, Yu, Wesley, Chuang, Po-Jen, Lin, Chun-Li, Huang, Chih-Wei, Chen, Jun-Ming, Chang, Shao-Ju, Janardan, Nachiketa, Lee, Tung-Ying, Chen, Ethan, Cheng, Chao-Yu
• Format: Conference Proceeding
• Language: English
• Published: IEEE 01-08-2020
• Subjects: Adders; Inspection; Recycling; Sensitivity; Silicon; Surface treatment
• ISSN: 2376-6697
• DOI: 10.1109/ASMC49169.2020.9185221

Defect control is an important part of semiconductor manufacturing as it ensures device quality. In general, defect control is accomplished using numerous types of inspection equipment to find excursion wafers or process tools and help identify the defect source during production. However, the balance between productivity and inspection needs to be calculated carefully to minimize the manufacturing cost. In general, achieving high productivity is the priority for a semiconductor factory, requiring inspection cost saving while still maintaining stable device yield. As one of the many inspection points, all incoming test wafers are qualified by unpatterned wafer defect inspectors, which raises cost concerns for manufacturing. Extending test wafer reuse lifetime is a common target for cost savings. In this paper, an advanced inspection methodology is described to achieve the maximum recycling extension of nitride (Si 3 N 4 ) deposited wafers. The inspection bottleneck of the recycling extension is not only related to increased surface roughness after film removal, but also to the inspected sensitivity shift value between pre-and post-scans. The Surfscan ® SP3 and Surfscan ® SP5 unpatterned wafer defect inspection systems are used for the study of recycling extension of test wafers. Furthermore, the technique of defect source analysis (DSA) is utilized to identify the suitable pre-scan sensitivity for the zero false adder goal. In summary, the optimization of the inspector's aperture configuration for post-scan inspection can minimize the sensitivity shift value. Based on the evaluated Si 3 N 4 layers, 26nm pre-scan sensitivity is required to avoid false adders. Furthermore, the Surfscan SP5 is the preferred platform over the Surfscan SP3 due to the better suppression of haze and a 3x faster throughput. Up to 5 \sim 7 wafer recycle times for test wafers can be achieved for the demonstrated Si 3 N 4 layers, which can save 84% incoming wafer purchasing.