Effectiveness comparisons of outlier screening methods for frequency dependent defects on complex ASICs

• Published in: Proceedings. 21st VLSI Test Symposium, 2003 pp. 39 - 46
• Main Authors: Benware, B.R., Madge, R., Lu, C., Daasch, R.
• Format: Conference Proceeding
• Language: English
• Published: IEEE 2003
• Subjects: Application specific integrated circuits; Costs; Delay; Frequency dependence; Large scale integration; Logic design; Logic testing; Production; System testing; Timing
• ISBN: 9780769519241; 0769519245
• ISSN: 1093-0167; 2375-1053
• DOI: 10.1109/VTEST.2003.1197631

In sub-micron processes, resistive path defects are increasingly contributing to the yield loss and the customer fail pareto. Data has been collected on a series of ASIC products and it has been used to compare the effectiveness of full vector set transition delay fault tests with reduced vector sets, minVDD, customer functional tests and customers system fails. Results show that fault models do not predict the defect coverage well and cost effective screening of frequency outliers and minVDD outliers is possible and is critical in improving customer quality.