A Test Design for Quick Determination of Incoherency in Chip Multiprocessors' Cache Realizing MOESI Protocol
The data coherence in the cache systems of CMPs (Chip Multi-Processors) is to be more accurate and reliable. In this work, we propose an effective solution to the issue through introduction of highly efficient test logic (fault detection unit). The test design is based on the modular structure of Ce...
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| Published in: | 2012 International Symposium on Electronic System Design (ISED) pp. 216 - 220 |
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| Main Authors: | , |
| Format: | Conference Proceeding |
| Language: | English |
| Published: |
IEEE
01-12-2012
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| Online Access: | Get full text |
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| Summary: | The data coherence in the cache systems of CMPs (Chip Multi-Processors) is to be more accurate and reliable. In this work, we propose an effective solution to the issue through introduction of highly efficient test logic (fault detection unit). The test design is based on the modular structure of Cellular Automata (CA). The SACA (single length single cycle attractor cellular automata) has been introduced to identify the inconsistencies in cache line states of processors' private caches realizing the MOESI protocol. The simple hardware implementation of the CA based design realizes quick decision on the cache coherency in CMPs with 100% accuracy. |
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| ISBN: | 1467347043 9781467347044 |
| DOI: | 10.1109/ISED.2012.67 |