Characterization of bit transistors in a functional SRAM
A direct bit transistor access (DBTA) scheme is proposed and implemented in 8 Mb SRAMpsilas at 65 nm and 45 nm nodes. It allows, for the first time, characterization of each bit transistor in a functional SRAM. It thus enables (a) collection of transistor data across bit arrays, (b) collection of ma...
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Published in: | 2008 IEEE Symposium on VLSI Circuits pp. 44 - 45 |
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Main Authors: | , , , , , , |
Format: | Conference Proceeding |
Language: | English |
Published: |
IEEE
01-06-2008
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Subjects: | |
Online Access: | Get full text |
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Summary: | A direct bit transistor access (DBTA) scheme is proposed and implemented in 8 Mb SRAMpsilas at 65 nm and 45 nm nodes. It allows, for the first time, characterization of each bit transistor in a functional SRAM. It thus enables (a) collection of transistor data across bit arrays, (b) collection of massive data for statistical analysis such as on transistor mismatch and NBTI Vt drift, and (c) collection of data for fast failure analysis. Measured data are presented. |
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ISBN: | 1424418046 9781424418046 |
ISSN: | 2158-5601 2158-5636 |
DOI: | 10.1109/VLSIC.2008.4585945 |