A Practical DFT Approach for Complex Low Power Designs

A Practical DFT Approach for Complex Low Power Designs

Low power designs create new challenges in design implementation, verification and testing. DFT practice that overlooks test power may result in yield loss/overkill during manufacturing test. This paper addresses the practical problems often encountered during DFT implementation and manufacturing te...

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Bibliographic Details
Published in:2009 Asian Test Symposium pp. 90 - 91
Main Authors: Kifli, A., Chen, Y.W., Tsay, Y.W., Wu, K.C.
Format: Conference Proceeding
Language:English
Published: IEEE 01-11-2009
Subjects:
ATPG
Automatic test pattern generation
Circuit testing
Consumer electronics
Design for testability
DFT
Dynamic voltage scaling
Energy consumption
Job shop scheduling
Logic testing
low-power
MSMV
Pulp manufacturing
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Description
Summary:Low power designs create new challenges in design implementation, verification and testing. DFT practice that overlooks test power may result in yield loss/overkill during manufacturing test. This paper addresses the practical problems often encountered during DFT implementation and manufacturing test for complex low power designs.
ISBN:0769538649
9780769538648
ISSN:1081-7735
2377-5386
DOI:10.1109/ATS.2009.61