Analysis and design of a wideband high efficiency CMOS outphasing amplifier

This work presents the analysis and design of a novel transformer-based power combining network for an efficient outphasing power amplifier (PA). The proposed power combining network was implemented on PCB together with two 65nm CMOS class-E PA's. Measurements show a peak output power of more t...

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Bibliographic Details
Published in:2010 IEEE Radio Frequency Integrated Circuits Symposium pp. 399 - 402
Main Authors: van Schie, M C A, van der Heijden, M P, Acar, M, de Graauw, A J M, de Vreede, L C N
Format: Conference Proceeding
Language:English
Published: IEEE 01-05-2010
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Summary:This work presents the analysis and design of a novel transformer-based power combining network for an efficient outphasing power amplifier (PA). The proposed power combining network was implemented on PCB together with two 65nm CMOS class-E PA's. Measurements show a peak output power of more than 30dBm over a 29% bandwidth around 700MHz. The peak output power at 700MHz equals 33.9dBm. The 10dB back-off efficiency is larger than 27.3% over the same 29% bandwidth. The 6dB back-off efficiency is larger than 46.4% over this bandwidth. The drain efficiency at 650MHz is larger than 50% over a 10dB power back-off range, which is, to our best knowledge, the highest back-off efficiency reported in a CMOS outphasing PA to date.
ISBN:9781424462407
1424462401
ISSN:1529-2517
2375-0995
DOI:10.1109/RFIC.2010.5477315