An analytical model for false turn-on evaluation of GaN transistor in bridge-leg configuration
Gallium Nitride (GaN) transistors are especially attractive in their capability of switching at high frequencies, and enable power conversion systems with reduced size and higher efficiency. However, owing to the low threshold voltage of the commercially available enhancement-mode (E-mode) GaN devic...
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Published in: | 2016 IEEE Energy Conversion Congress and Exposition (ECCE) pp. 1 - 6 |
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Main Authors: | , , , , |
Format: | Conference Proceeding |
Language: | English Japanese |
Published: |
IEEE
01-09-2016
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Subjects: | |
Online Access: | Get full text |
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Summary: | Gallium Nitride (GaN) transistors are especially attractive in their capability of switching at high frequencies, and enable power conversion systems with reduced size and higher efficiency. However, owing to the low threshold voltage of the commercially available enhancement-mode (E-mode) GaN devices, the devices are more prone to false turn-on phenomenon, leading to larger switching losses, circuit oscillation and even shoot-through in bridge-leg configuration. In order to enlarge the gate terminal's safe operating margin without increasing the reverse conduction loss during dead-time, a negative gate voltage bias for turn-off and an anti-parallel diode can be applied to GaN transistor. In this work, to accurately evaluate the detailed turn-on characteristics of GaN transistors in bridge-leg configuration, analytical device models that count for the strong nonlinearities of device's I-V and C-V characteristics are firstly developed. Then an analytical circuit model taking into account the circuit parameters as well as the intrinsic behaviors of GaN transistor and anti-parallel diode is established. Thus, the critical transient waveforms, such as displacement currents and false triggering voltage pulse on gate terminal can be simulated. The proposed models are then verified on a testing board with GaN-based bridge-leg circuit. To provide design guidelines for suppressing false turn-on, impacts of circuit parameters are investigated based on the proposed model. |
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DOI: | 10.1109/ECCE.2016.7854840 |