Demonstration of an extendable and industrial 300mm BEOL integration for the 65-nm technology node

• Published in: IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004 pp. 317 - 320
• Main Authors: Hinsinger, O., Fox, R., Sabouret, E., Goldberg, C., Verove, C., Besling, W., Brun, P., Josse, E., Monget, C., Belmont, O., Van Hassel, J., Sharma, B.G., Jacquemin, J.P., Vannier, P., Humbert, A., Bunel, D., Gonella, R., Mastromatteo, E., Reber, D., Farcy, A., Mueller, J., Christie, P., Nguyen, V.H., Cregut, C., Berger, T.
• Format: Conference Proceeding
• Language: English
• Published: Piscataway NJ IEEE 2004
• Subjects: Applied sciences; Conductivity; Copper; Design. Technologies. Operation analysis. Testing; Dielectric materials; Electronics; Etching; Exact sciences and technology; Integrated circuit interconnections; Integrated circuits; Lithography; Materials reliability; Resists; Robustness; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices; Wiring; Performance evaluation; Trench technology; Interconnection; Integrated circuit; Miniaturization; Reliability; Low k dielectric; Electrical characteristic
• ISBN: 0780386841; 9780780386846
• DOI: 10.1109/IEDM.2004.1419144

Given the much discussed challenges of interconnect scaling at the 65-nm node, the choice of process architecture is a key determinant of performance and extendibility. An alternate trench-first with hardmask integration is described in this work, including subsequent benefits. BEOL design rules are detailed for the 65-nm architecture, supporting both "low-k" and "ultra-low-k" backends, satisfying RC scaling requirements. Electrical parametric performance and yield are presented for a fully-integrated 300mm backend utilizing 65-nm design rules demonstrating the viability of this architecture for the 65-nm node and beyond.