Low-power-consuming 24-Gb/s multiplexer in 90-nm CMOS for optical transceivers

In this paper, an integrated 2-to-1 selector multiplexer in 90-nm complementary metal-oxide semiconductor (CMOS) digital technology is presented. The multiplexer is based on a differential Gilbert-cell structure. Peaking inductors are used to improve the bandwidth. At a supply voltage of 1.2 V, a sp...

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Bibliographic Details
Published in:12th International Symposium on Electron Devices for Microwave and Optoelectronic Applications, 2004. EDMO 2004 pp. 48 - 51
Main Authors: Rodoni, L.C., Morf, T., Ellinger, F., von Buren, G., Jackel, H.
Format: Conference Proceeding
Language:English
Published: Piscataway NJ IEEE 2004
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Summary:In this paper, an integrated 2-to-1 selector multiplexer in 90-nm complementary metal-oxide semiconductor (CMOS) digital technology is presented. The multiplexer is based on a differential Gilbert-cell structure. Peaking inductors are used to improve the bandwidth. At a supply voltage of 1.2 V, a speed performance of 24 Gb/s is achieved. The circuit core consumes only 10 mA. Common drain output buffers allow measurements at 50 /spl Omega/.
ISBN:0780385748
9780780385740
DOI:10.1109/EDMO.2004.1412398