Design and characterisation of a Physically Unclonable Function on FPGA using second-order compensated measurement

• Published in: 2022 IFIP/IEEE 30th International Conference on Very Large Scale Integration (VLSI-SoC) pp. 1 - 2
• Main Authors: Fernandez-Aragon, J., Diez-Senorans, G., Garcia-Bosque, M., Celma, S.
• Format: Conference Proceeding
• Language: English
• Published: IEEE 03-10-2022
• Subjects: Area measurement; compensated measurement; FPGA; hardware security; identifiability; Physical unclonable function; physically unclonable functions; ring oscillator; Ring oscillators; Temperature dependence; Temperature measurement; Very large scale integration; Voltage measurement
• ISSN: 2324-8440
• DOI: 10.1109/VLSI-SoC54400.2022.9939593

Physically unclonable functions (PUFs) have become an important area of study in the field of hardware security. In this paper we have designed a ring oscillator PUF (RO-PUF) implemented it in FPGA and characterised it using a new concept: second-order compensated measurement by two-bit extraction. The results show that it is possible to use two quality bits to generate the response, thus improving the performance compared to conventional RO-PUFs.