Co-integration Process Compatible Input/Output (I/O) Device Options for GAA Nanosheet Technology

• Published in: ESSDERC 2022 - IEEE 52nd European Solid-State Device Research Conference (ESSDERC) pp. 265 - 268
• Main Authors: Gaddemane, Gautam, Bhuwalka, Krishna K., Matagne, Philippe, Rzepa, Gerhard, Van de Put, Maarten, Santermans, Sybren, Baumgartner, Oskar, Wu, Hao, Hellings, Geert
• Format: Conference Proceeding
• Language: English
• Published: IEEE 19-09-2022
• Subjects: Benchmark testing; Europe; FinFETs; Gallium arsenide; Gate-all-around; input-output devices; Logic gates; Metals; nanosheet; Performance evaluation
• DOI: 10.1109/ESSDERC55479.2022.9947139

We benchmark possible device options for gate-all-around input/output devices which are process compatible with core logic gate-all-around (GAA) nanosheet devices. We consider a partial gate-all-around device (without metal filling between the sheets) as well as a device with a thin metal gate between the sheets, resulting in work-function mismatch between side- and inner-gates. The results are benchmarked against ideal GAA I/O devices to understand the performance impact for each case. The partial GAA device performs well under certain geometric conditions ( W_{\text{NS}} < 30\text{nm} ). However, the device with thin metal between the sheets shows excellent performance even for large WNS with large work-function deviation assumptions.