The utility of fast active messages on many-core chips: Efficient supercomputing project

The utility of fast active messages on many-core chips: Efficient supercomputing project

This article consists of a collection of slides from the author's conference presentation on the deployment of many core chips for supercomputing applications. In the many core era, power has become the limiting factor in performance scaling. This poster demonstrates the ability of active messa...

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Bibliographic Details
Published in:2011 IEEE Hot Chips 23 Symposium (HCS) p. 1
Main Authors: Harting, R. Curtis, Parikh, Vishal, Dally, William J.
Format: Conference Proceeding
Language:English
Published: IEEE 01-08-2011
Subjects:
Computer architecture
Multicore processing
Parallel processing
Program processors
Online Access:Get full text
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Description
Summary:This article consists of a collection of slides from the author's conference presentation on the deployment of many core chips for supercomputing applications. In the many core era, power has become the limiting factor in performance scaling. This poster demonstrates the ability of active messages to increase the energy efficiency of parallel code.
DOI:10.1109/HOTCHIPS.2011.7477516