Optimize Matrix Multiplication Utilizing OpenCL FPGA Kernel
This paper presents an analysis of matrix multiplication utilizing OpenCL, optimization techniques, and a quantitative comparison of matrix multiplication between FPGA and CPU performance based on power consumption, speed and efficiency. We show how algorithm improvements, coupled with specific comp...
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Published in: | 2023 Congress in Computer Science, Computer Engineering, & Applied Computing (CSCE) pp. 945 - 952 |
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Main Authors: | , |
Format: | Conference Proceeding |
Language: | English |
Published: |
IEEE
24-07-2023
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Subjects: | |
Online Access: | Get full text |
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Summary: | This paper presents an analysis of matrix multiplication utilizing OpenCL, optimization techniques, and a quantitative comparison of matrix multiplication between FPGA and CPU performance based on power consumption, speed and efficiency. We show how algorithm improvements, coupled with specific compilation optimization can improve matrix multiplication performance. Furthermore, we demonstrate the potential for performance gains by utilizing onboard FPGAs to off-load machine learning workloads on edge devices. |
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DOI: | 10.1109/CSCE60160.2023.00159 |