32nm CMOS Analog Circuit Implementation of STDP for SNNs

• Published in: 2023 14th International Conference on Computing Communication and Networking Technologies (ICCCNT) pp. 1 - 3
• Main Authors: Bahuguna, Yash, Sinha, Ayush, Adhikari, Sahil, Kumar, Vinay
• Format: Conference Proceeding
• Language: English
• Published: IEEE 06-07-2023
• Subjects: Behavioral sciences; Capacitors; Neurons; Simulation; Spike Timing Dependent Plasticity (STDP); Spiking Neural Networks; Timing; Transistors; Unsupervised Learning Rule; Voltage
• ISSN: 2473-7674
• DOI: 10.1109/ICCCNT56998.2023.10307793

Spiking Neural Network is a network that operates with neurons that generate voltage or current spikes and are connected by synapses. Spike Time Dependent Plasticity (STDP) is a learning rule which governs how strong or weak the connections between two neurons will be based on temporal information of spike activity of two connected neurons. We propose a 32nm analog CMOS implementation of STDP based synapse in this work. Simulation results demonstrate that the circuit effectively emulates the behavior of STDP. The proposed circuit can be used as a synapse in the construction of a complete SNN architecture.