Study of p-type FinFETs' Parameter Variability Depending on Wafer Location

In this paper we study the variability of measured drain current, output characteristics and threshold voltage for 14-nm p-type FinFETs depending on their location on the silicon wafer-three positions on the wafer are considered. The results showed that the technology is steady with weak parameter v...

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Bibliographic Details
Published in:	2019 IEEE XXVIII International Scientific Conference Electronics (ET) pp. 1 - 4
Main Authors:	Angelov, George Vasilev, Spasova, Mariya Lyubomirova, Nikolov, Dimitar Nikolov, Rusev, Rostislav Pavlov
Format:	Conference Proceeding
Language:	English
Published:	IEEE 01-09-2019
Subjects:	14 nm p-type FinFETs FinFETs Logic gates parameter variability Semiconductor device measurement Threshold voltage Voltage measurement
Online Access:	Get full text
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Summary:	In this paper we study the variability of measured drain current, output characteristics and threshold voltage for 14-nm p-type FinFETs depending on their location on the silicon wafer-three positions on the wafer are considered. The results showed that the technology is steady with weak parameter variability depending on wafer position.
DOI:	10.1109/ET.2019.8878503