Experimental evaluation of ATM congestion control mechanisms

A critical issue in the design of fast packet-switch-based networks is the avoidance of data loss due to congestion. In the context of ATM networks, many link-level congestion control mechanisms for ABR traffic have been proposed and simulated, and a few have been implemented. This paper presents, f...

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Bibliographic Details
Published in:Annual Joint Conference of the IEEE Computer and Communications Societies Vol. 3; pp. 1324 - 1332 vol.3
Main Authors: Chandra, P., Fisher, A., Kosak, C., Steenkiste, P.
Format: Conference Proceeding Journal Article
Language:English
Published: IEEE 1997
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Summary:A critical issue in the design of fast packet-switch-based networks is the avoidance of data loss due to congestion. In the context of ATM networks, many link-level congestion control mechanisms for ABR traffic have been proposed and simulated, and a few have been implemented. This paper presents, for the first time, an experimental comparison of several such mechanisms. To drive this comparison, we have developed a set of benchmarks that provide a quantitative characterization of congestion control performance. We also describe a simple but novel technique, the "virtual port card", for implementing both non-native switch behavior and long link delays in ATM networks. This technique allows us to compare a wide range of mechanisms on a single flexible hardware platform. Our measurements show that while several of the ATM flow control mechanisms can eliminate cell loss, there are still several unresolved problems. First, for some traffic scenarios we see very poor application-level performance, especially in the presence of bursty traffic. Second, the performance is very sensitive to the flow control parameters and identifying an appropriate set of parameters is difficult since it depends heavily on the traffic conditions.
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ISBN:0818677805
9780818677809
ISSN:0743-166X
2641-9874
DOI:10.1109/INFCOM.1997.631165