Modeling and mitigating AC common mode conversion in multi-Gb/s differential printed circuit boards

• Published in: Electrical Performance of Electronic Packaging - 2004 pp. 29 - 32
• Main Authors: Heck, H., Hall, S., Horine, B., Liang, T.
• Format: Conference Proceeding
• Language: English
• Published: IEEE 2004
• Subjects: Equations; Frequency; Hardware; Insertion loss; Manufacturing; Predictive models; Printed circuits; Testing; Timing; Voltage
• ISBN: 0780386671; 9780780386679
• DOI: 10.1109/EPEP.2004.1407536

Techniques for quantifying and minimizing the impact of differential signal phase skew created by the non-homogeneous nature of FR4 PCBs are presented. Experimental results that allow modeling and simulation at multi-Gb/s signaling rates are developed and used to estimate the impact to voltage and timing margins at 5-10 Gb/s as a function of PCB trace length. A design approach for mitigating the impact is discussed, and results from a manufacturability study are used to assess the effectiveness of the approach.