An efficient methodology for generating optimal and uniform march tests

• Published in: Proceedings 19th IEEE VLSI Test Symposium. VTS 2001 pp. 231 - 237
• Main Authors: Al-Harbi, S.M., Gupta, S.K.
• Format: Conference Proceeding
• Language: English
• Published: IEEE 2001
• Subjects: Automatic testing; Built-in self-test; Decoding; Fault detection; Manufacturing; Read-write memory; Sufficient conditions
• ISBN: 9780769511221; 0769511228
• DOI: 10.1109/VTS.2001.923444

A large number of march tests that provide different fault coverages have been published and a few methodologies have been presented for automatically generating march tests. This paper presents a new methodology for generating optimal and uniform march tests. The new methodology uses a compact representation of faults, generates necessary and sufficient conditions for their detection, and generates tests using the conditions along with the properties of march tests. The methodology is demonstrated as being more efficient than those previously presented. It has been used to (a) generate new optimal tests that are uniform, which are desired to simplify BIST architecture, (b) prove the optimally of some well-known tests such as March C-, and (c) generate a complete set of optimal march tests for different combinations of faults. The proposed approach hence provides memory manufacturers with an optimal test to cover the types of faults that are likely to occur in their memories.