Embracing the Unreliability of Memory Devices for Neuromorphic Computing

Embracing the Unreliability of Memory Devices for Neuromorphic Computing

The emergence of resistive non-volatile memories opens the way to highly energy-efficient computation near- or in-memory. However, this type of computation is not compatible with conventional ECC, and has to deal with device unreliability. Inspired by the architecture of animal brains, we present a...

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Bibliographic Details
Published in:2020 IEEE International Reliability Physics Symposium (IRPS) pp. 1 - 5
Main Authors: Bocquet, Marc, Hirtzlin, Tifenn, Klein, Jacques-Olivier, Nowak, Etienne, Vianello, Elisa, Portal, Jean-Michel, Querlioz, Damien
Format: Conference Proceeding
Language:English
Published: IEEE 01-04-2020
Subjects:
Error correction codes
Memory management
Neuromorphic engineering
Nonvolatile memory
Programming
Reliability
System-on-chip
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Summary:The emergence of resistive non-volatile memories opens the way to highly energy-efficient computation near- or in-memory. However, this type of computation is not compatible with conventional ECC, and has to deal with device unreliability. Inspired by the architecture of animal brains, we present a manufactured differential hybrid CMOS/RRAM memory architecture suitable for neural network implementation that functions without formal ECC. We also show that using low-energy but error-prone programming conditions only slightly reduces network accuracy.
ISSN:1938-1891
DOI:10.1109/IRPS45951.2020.9128346