Low-power voltage-controlled oscillators in 90-nm CMOS using high-quality thin-film postprocessed inductors

Wafer-level packaging (WLP) technology offers novel opportunities for the realization of high-quality on-chip passives needed in RF front-ends. This paper demonstrates a thin-film WLP technology on top of a 90-nm RF CMOS process with one 15-GHz and two low-power 5-GHz voltage-controlled oscillators...

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Bibliographic Details
Published in:IEEE journal of solid-state circuits Vol. 40; no. 9; pp. 1922 - 1931
Main Authors: Linten, D., Xiao Sun, Carchon, G., Jeamsaksiri, W., Mercha, A., Ramos, J., Jenei, S., Wambacq, P., Dehan, M., Aspemyr, L., Scholten, A.J., Decoutere, S., Donnay, S., De Raedt, W.
Format: Journal Article Conference Proceeding
Language:English
Published: New York, NY IEEE 01-09-2005
Institute of Electrical and Electronics Engineers
The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
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Summary:Wafer-level packaging (WLP) technology offers novel opportunities for the realization of high-quality on-chip passives needed in RF front-ends. This paper demonstrates a thin-film WLP technology on top of a 90-nm RF CMOS process with one 15-GHz and two low-power 5-GHz voltage-controlled oscillators (VCOs) using a high-quality WLP or above-IC inductor. The 5-GHz VCOs have a power consumption of 0.33 mW and a phase noise of -115 dBc/Hz and -111 dBc/Hz at 1-MHz offset, respectively, and the 15-GHz VCO has a phase noise of -105 dBc/Hz at 1-MHz offset with a power consumption of 2.76 mW.
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ISSN:0018-9200
1558-173X
DOI:10.1109/JSSC.2005.848144