Reducing the Short Channel Effect of Transistors and Reducing the Size of Analog Circuits

• Published in: Active and passive electronic components Vol. 2019; no. 2019; pp. 1 - 9
• Main Authors: Prouvee, Jerome, Foucauld, Emeric de, Leduc, Yves, Jacquemod, G., Wei, Zhaopeng, Blampey, Benjamin
• Format: Journal Article
• Language: English
• Published: Cairo, Egypt Hindawi Publishing Corporation 01-01-2019; Hindawi; John Wiley & Sons, Inc; Hindawi Limited
• Subjects: Analog circuits; Circuit components; Current mirrors; Electronics; Engineering Sciences; Integrated circuits; Oscillators; Passive components; Rings (mathematics); Semiconductor chips; Semiconductor devices; Signal processing; Simulation; Topology; Transistors
• ISSN: 0882-7516; 1563-5031
• DOI: 10.1155/2019/4578501

Analog integrated circuits never follow the Moore’s Law. This is particularly right for passive component. Due to the Short Channel Effect, we have to implement longer transistor, especially for analog cell. In this paper, we propose a new topology using some advantages of the FDSOI (Fully Depleted Silicon on Insulator) technology in order to reduce the size of analog cells. First, a current mirror was chosen to illustrate and validate a new design. Measured currents, with 35nm transistor length, have validated our new cross-coupled back-gate topology. Then, a VCRO (Voltage Controlled Ring Oscillator) based on complementary inverter is also used to remove passive components reducing the size of the circuit.