Compensating Inhomogeneities of Neuromorphic VLSI Devices Via Short-Term Synaptic Plasticity

• Published in: Frontiers in computational neuroscience Vol. 4; p. 129
• Main Authors: Bill, Johannes, Schuch, Klaus, Brüderle, Daniel, Schemmel, Johannes, Maass, Wolfgang, Meier, Karlheinz
• Format: Journal Article
• Language: English
• Published: Switzerland Frontiers Research Foundation 2010; Frontiers Media S.A
• Subjects: Computer programs; Embedded systems; Firing pattern; Integrated circuits; Leaky Integrate-and-Fire Neuron; Neural networks; neuromorphic hardware; Neurons; Neuroscience; Parallel Computing; PCSIM; Plasticity (neural); robustness; Self-regulation; Short term; Software; Synaptic depression; Synaptic plasticity; PCSIM; leaky integrate-and-fire neuron; short-term synaptic plasticity; neuromorphic hardware; robustness; spiking neural networks; self-regulation; parallel computing
• ISSN: 1662-5188; 1662-5188
• DOI: 10.3389/fncom.2010.00129

Recent developments in neuromorphic hardware engineering make mixed-signal VLSI neural network models promising candidates for neuroscientific research tools and massively parallel computing devices, especially for tasks which exhaust the computing power of software simulations. Still, like all analog hardware systems, neuromorphic models suffer from a constricted configurability and production-related fluctuations of device characteristics. Since also future systems, involving ever-smaller structures, will inevitably exhibit such inhomogeneities on the unit level, self-regulation properties become a crucial requirement for their successful operation. By applying a cortically inspired self-adjusting network architecture, we show that the activity of generic spiking neural networks emulated on a neuromorphic hardware system can be kept within a biologically realistic firing regime and gain a remarkable robustness against transistor-level variations. As a first approach of this kind in engineering practice, the short-term synaptic depression and facilitation mechanisms implemented within an analog VLSI model of I&F neurons are functionally utilized for the purpose of network level stabilization. We present experimental data acquired both from the hardware model and from comparative software simulations which prove the applicability of the employed paradigm to neuromorphic VLSI devices.