Investigation on Recrystallization Channel for Vertical C-Shaped-Channel Nanosheet FETs by Laser Annealing

• Published in: Nanomaterials (Basel, Switzerland) Vol. 13; no. 11; p. 1786
• Main Authors: Chen, Zhuo, Zhu, Huilong, Wang, Guilei, Wang, Qi, Xiao, Zhongrui, Zhang, Yongkui, Liu, Jinbiao, Lu, Shunshun, Du, Yong, Yu, Jiahan, Xiong, Wenjuan, Kong, Zhenzhen, Du, Anyan, Yan, Zijin, Zheng, Yantong
• Format: Journal Article
• Language: English
• Published: Switzerland MDPI AG 01-06-2023; MDPI
• Subjects: Annealing; Chemical vapor deposition; Dynamic random access memory; Etching; Field effect transistors; Identification and classification; laser annealing; Laser beam annealing; Lasers; Memory devices; Methods; Nanoparticles; Nanosheets; Photovoltaic cells; Properties; Recrystallization; Scanning electron microscopy; Self alignment; self-aligned; Semiconductor devices; Si cap; Silicon nitride; Transistors; vertical channel transistor; China; United States > US; vertical channel transistor; Si cap; recrystallization; laser annealing; self-aligned
• ISSN: 2079-4991; 2079-4991
• DOI: 10.3390/nano13111786

Transistor scaling has become increasingly difficult in the dynamic random access memory (DRAM). However, vertical devices will be good candidates for 4F
DRAM cell transistors (F = pitch/2). Most vertical devices are facing some technical challenges. For example, the gate length cannot be precisely controlled, and the gate and the source/drain of the device cannot be aligned. Recrystallization-based vertical C-shaped-channel nanosheet field-effect transistors (RC-VCNFETs) were fabricated. The critical process modules of the RC-VCNFETs were developed as well. The RC-VCNFET with a self-aligned gate structure has excellent device performance, and its subthreshold swing (SS) is 62.91 mV/dec. Drain-induced barrier lowering (DIBL) is 6.16 mV/V.