Monte Carlo simulation of the CHISEL flash memory cell
This work shows how physically-based hot carrier simulation was used to understand the importance of CHannel Initiated Secondary ELectron (CHISEL) injection in scaled MOSFETs, and how it was used to develop a powerful CHISEL-based technique for low voltage flash programming. Furthermore, it is shown...
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Published in: | IEEE transactions on electron devices Vol. 47; no. 10; pp. 1873 - 1881 |
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Main Authors: | , , |
Format: | Journal Article |
Language: | English |
Published: |
New York
IEEE
01-10-2000
The Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Subjects: | |
Online Access: | Get full text |
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Summary: | This work shows how physically-based hot carrier simulation was used to understand the importance of CHannel Initiated Secondary ELectron (CHISEL) injection in scaled MOSFETs, and how it was used to develop a powerful CHISEL-based technique for low voltage flash programming. Furthermore, it is shown how CHISEL flash addresses many of the disadvantages of CHE programming techniques, making it an ideal candidate for low-voltage, low-power Gigabit flash memories. |
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Bibliography: | ObjectType-Article-2 SourceType-Scholarly Journals-1 ObjectType-Feature-1 content type line 23 |
ISSN: | 0018-9383 1557-9646 |
DOI: | 10.1109/16.870565 |