Monolithically Integrated 4H-SiC MOSFET and JBS Diode (JBSFET) Using a Single Ohmic/Schottky Process Scheme

• Published in: IEEE electron device letters Vol. 37; no. 12; pp. 1605 - 1608
• Main Authors: Woongje Sung, Baliga, B. J.
• Format: Journal Article
• Language: English
• Published: New York IEEE 01-12-2016; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: 4H-SiC; Annealing; Contact resistance; JBS diode; JBSFET; MOSFET; MOSFETs; ohmic contact; Schottky barriers; Schottky contact; Schottky diodes; Silicon carbide
• ISSN: 0741-3106; 1558-0563
• DOI: 10.1109/LED.2016.2618720

This letter reports a new 900 V 4H-SiC JBSFET containing an MOSFET with an integrated JBS diode in the center area of the chip. Both MOSFET and JBS diode structures utilize the same edge termination structure,which results in 30% reduction in SiC wafer area consumption in case of 10 A rating device. In order to form a Schottky contact for the JBS diode as well as ohmic contacts for n+ source and p+ body of the MOSFET, a simple metal process flow has been newly developed. It was found that Ni can simultaneously form ohmic contacts on n+ and p+ implanted regions while it remains a Schottky contact on the n-epitaxial drift layer when it is annealed at moderate temperature (900°C for 2 min). The proposed JBSFET was successfully fabricated using a nine-mask on 6-in 4H-SiC wafers.